instruction address meaning in Chinese
指仿地址
指令地址
Examples
- Instruction addressing modes
指令寻址模态 - Code instructions address data using the virtual address ; the memory management unit ( mmu ) is responsible for the translation of the virtual address to the physical ram address
代码指令使用了虚拟的地址；内存管理单元( mmu )负责把虚地址转换成实际的物理ram地址。 - The addr2line tool which is part of the standard gnu binutils is a utility that translates an instruction address and an executable image into a filename , function name , and source line number
Addr2line工具（它是标准的gnu binutils中的一部分）是一个可以将指令的地址和可执行映像转换成文件名、函数名和源代码行数的工具。 - System calls . when an emulator ordinarily encounters a powerpc system call instruction , it emulates the exception by storing the instruction address into the srr0 register , setting some architecture - defined bits in srr1 , and transferring control to physical address 0xc00 . some powerpc variants allow more control over this behavior , but this is the traditional powerpc model
当仿真器正常地碰到一个powerpc系统调用指令时，它便将指令地址存入到srr0寄存器，设置srr1中某些体系结构定义的位，并将控制权转交给物理地址0xc00 ，从而仿真这个异常（有些powerpc的变种允许对这种行为有更多的控制，但是这里的这种是传统的powerpc模型） 。 - The paper elaborates risc technology characteristic and 5 - stage pipeline architecture and function of the 64 - bit risc cpu , and dwells on 64 - bit vega cpu characteristic , and details the eda technology and the main flow of asic design , and elaborates the operation and exception process of the vega cpu and virtual instruction address " architecture and generation , and details cache architecture and mmu . the master dissertation dwells on virtual address translating into physical address , instruction cache finding address and instruction fetching , too
详细的阐述了64位vegacpu的特点，阐述了eda技术和asic设计的主要流程，阐述了vegacpu流水线结构、流水线操作、流水线暂停和异常处理，虚拟指令地址的结构和产生， mmu结构，包括指令tlb结构和虚拟指令地址向物理指令地址的生成流程， cache结构，寻址原理和指令的写策略，指令高速缓存的寻址原理和结构，以及指令的获取流程。